The present invention relates to non-semiconductor microminiature electronic elements and pertains particularly to an improved package and method of packaging of microminiature electronic components.
For many years, electronic circuit boards have been fabricated by interconnecting a plurality of electronic components, both active and passive, on a planar printed circuit board. Typically, this printed circuit board has comprised an Epoxy/fiberglass laminate substrate clad with a sheet of copper, which as been etched to delineate the conduct paths. Holes were drilled through terminal portions of the conductive paths for receiving electronic component leads which were subsequently soldered thereto.
More recently, so-called surface mount technology has evolved to permit more efficient automatic mass production of circuit boards with higher component densities. With this approach, certain packaged components are automatically placed at preselected locations on top of a printed circuit board so that their leads are registered with, and lie on top of corresponding solder paths. The printed circuit board is then processed by exposure to infrared or vapor phase soldering techniques to re-flow the solder and thereby establish a permanent electrical connection between the leads and their corresponding conductive paths on the printed circuit board.
Dual in-line chip carrier packages have existed for many years. The most common example is an integrated circuit, which is bonded to a ceramic carrier and electrically connected to a lead frame providing opposite rows of parallel electrical leads. The integrated circuit and ceramic carrier are normally encased in a black, rectangular plastic housing from which the leads extend. Typically, these dual in-line packages are mounted horizontally, i.e. with the leads extending co-planar with the printed circuit board. Such dual in-line packages have heretofore been attached to printed circuit boards by surface mounting techniques.
The increasing miniaturization of electrical and electronic elements and high density mounting thereof has created increasing problems with electrical isolation and mechanical interconnection. In particular, it creates more difficulty establishing reliable and efficient connection between fine gauge (AWG 24 to AWG 50) copper wires and egress hardware or terminals. Presently known interconnect methods severely limit the ability to provide density and reliable electrical and mechanical isolation between distinct egress or terminal points due to space limitations.
The prior art approach, as illustrated in FIG. 1, is to extend a fine copper wire 6 forming the element lead and to wrap or coil it around a terminal pin 8 of a terminal and apply solder to the connection. This requires space that is not always available and does not allow adequate separation for high voltages that may be required in the circuit. Another problem with this approach is that element leads are frequently broken or sheared during a subsequent encapsulation process. In addition, the lead is also frequently broken as the result of thermal expansion and contraction of the leads and/or terminals.
It is, therefore, desirable that an improved package and method of packaging of microminiature electronic components be available.